1. Field of the Invention
The present invention relates to a semiconductor device.
2. Description of the Related Art
Japanese Patent Application Laid-Open No. JP2003-318398 (=JP2003318398) discloses a silicon carbide semiconductor device, specifically, a field effect transistor using a hetero interface. According to the above related art, a voltage applied to a gate electrode controls thickness of a barrier at the hetero interface, and a tunnel current allows a carrier to pass by when an element is on. In this case, a channel region such as MOSFET is not present, thereby providing a power semiconductor switch having high voltage capability (high reverse blocking voltage) and low on-resistance.
The above related art has such a structure that a P type region is formed on the gate electrode and on a silicon carbide SiC region below the gate electrode, thereby relaxing a field applied to a gate insulating film. Without connecting the P type region's potential to a source potential, however, the above field relaxing effect is restrictive, thus making it difficult to protect the gate insulating film.
Moreover, the P type region is formed in a position sufficiently adjacent to a drive point where i) the gate insulating film, ii) the hetero semiconductor region including polycrystalline silicon and iii) an SiC region contact each other. With the above structure, sufficiently implementing the field relaxing when the element is off may narrow a current passage when the element is on, thus increasing an on-resistance, which is a trade off, failing to sufficiently effect a good inherent feature of the device.